A DCT chip based on a new structured and computationally efficient DCT algorithm
- 4 December 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
A discrete cosine transform (DCT) algorithm and architecture that minimize both software and hardware costs are presented. The proposed approaches are either direct or indirect and are based on the decomposition of the DCT in three operations: permutation, fast Fourier transform, and rotation. The main characteristics of the VLSI implementation chosen for this DCT and inverse DCT algorithm are show. Its data path coupled with a twin-pages memory and its controller, which contains the microprograms of the DCT algorithm are described. The results in terms of data processing rate and silicon area are given Author(s) Duhamel, P. CNET, Issy-les-Moulineaux, France Guillemot, C. ; Carlach, J.C.Keywords
This publication has 4 references indexed in Scilit:
- Improved Fourier and Hartley transform algorithms: Application to cyclic convolution of real dataIEEE Transactions on Acoustics, Speech, and Signal Processing, 1987
- A Fast Recursive Algorithm For Computing The Discrete Cosine TransformPublished by SPIE-Intl Soc Optical Eng ,1986
- Simple FFT and DCT algorithms with reduced number of operationsSignal Processing, 1984
- A Fast Computational Algorithm for the Discrete Cosine TransformIEEE Transactions on Communications, 1977