Abstract
The paper presents an algorithm for fast power system contingency analysis using pattern recognition. The pattern space is clustered into data boxes for ease of search and flexibility of programming. The addressable memory structure of the pattern space decouples the voltage prediction problem into subproblems for one busbar and one contingency at a time. To reduce the working memory, the algorithm learns from the short-term load trend and selects only a few data boxes for on-line processing. Further computational savings and improvements in accuracy are achieved by adopting an innovative wafer data box structure that also facilitates subsequent refinement by additions/deletions of patterns acquired from real-time operational experience. Other techniques, with the same objectives, include a procedure for eliminating insignificant features from data boxes and clumping their effects into correction terms; a methodology for selecting the best expression for voltage prediction; and a pattern filter for placing the target state at the geographical centre of the training set nearest neighbourhood patterns.