A Fast Linearization Method to Evaluate The Effects of Circuits Contingencies Upon System Load-Bus Voltages
- 1 October 1982
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Apparatus and Systems
- Vol. PAS-101 (10), 3926-3932
- https://doi.org/10.1109/TPAS.1982.317044
Abstract
A fast linearization method devised to evaluate the effects of single or multiple-circuit contingencies upon the system load-bus voltages is presented.Keywords
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