The growth rate of selective epitaxial silicon is a function of the nucleation site seed area and the ratio of the area of the mask to silicon area exposed. Therefore, with commonly employed IC circuit patterns, it is difficult to achieve, using conventional epitaxial growth conditions, silicon deposit thickness uniformity needed for IC processing. This constitutes one of the main obstacles to utilizing CVD selective epitaxy as an SOI process or as a replacement of LOCOS for oxide isolation. Reported in this publication is a method of growing uniformly thick selective epitaxial silicon on a silicon wafer with mask openings to the substrate of various dimensions, and with various area ratios. The desired control of the deposit thickness is achieved at reduced pressures (below 50 torr) and relatively low deposition temperatures .