An Algorithm to Compact a VLSI Symbolic Layout with Mixed Constraints
- 1 April 1983
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 2 (2), 62-69
- https://doi.org/10.1109/tcad.1983.1270022
Abstract
No abstract availableKeywords
This publication has 6 references indexed in Scilit:
- Automatically generated area, power and delay optimized ALUsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1983
- ALI: A Procedural Language to Describe VLSI LayoutsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1982
- A Symbolic Design System for Integrated CircuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1982
- Layout aid for the design of VLSI circuitsComputer-Aided Design, 1981
- Virtual Grid Symbolic LayoutPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- Finding All the Elementary Circuits of a Directed GraphSIAM Journal on Computing, 1975