Determination of carrier saturation velocity in short-gate-length modulation-doped FET'S

Abstract

Based on a combined carrier saturation velocity/charge-control model, measured drain saturation current, small-signal transconductance and channel conductance data have been analyzed with consistency for the determination of the effective carrier saturation velocity using 1-µm gate-length MODFET's. The results demonstrate the validity of the model in the mid-range of gate bias voltage and indicate the extent of deviations that occur due to different physical processes in the lower and higher gate bias ranges.