Multiprocessor performance-measurement instrumentation

Abstract

Performance measurement for loosely and tightly coupled multiple-instruction multiple-data multiprocessor systems is addressed. For the paradigm of multiple processors solving a single problem faster, a taxonomy of hardware-supported measurement approaches is presented and critiqued. A hybrid measurement system that is, software with hardware support, is presented. The system, called the trace measurement system (Trams), initially consisted of a memory-mapped device using software triggering and hardware sampling of time and processor identification. A VLSI chip set that integrates the Trams functions of software triggering and hardware sampling with hardware counters is described, and its application is discussed. The tool introduces little perturbation and provides physically small and affordable performance-measurement support.