A method of fault simulation based on stem regions
- 1 January 1990
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 9 (2), 212-220
- https://doi.org/10.1109/43.46788
Abstract
No abstract availableThis publication has 7 references indexed in Scilit:
- A fault simulation method based on stem regionsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A reconvergent fanout analysis for efficient exact fault simulation of combinational circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Reconvergent fanout analysis and fault simulation complexity of combinational circuitsElectronics Letters, 1987
- Critical Path Tracing - An Alternative to Fault SimulationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1983
- An Algorithm for the Generation of Test Sets for Combinational Logic NetworksIEEE Transactions on Computers, 1975
- A Deductive Method for Simulating Faults in Logic CircuitsIEEE Transactions on Computers, 1972
- On an Improved Diagnosis ProgramIEEE Transactions on Electronic Computers, 1965