Gigabit logic operation with enhancement-mode GaAs MESFET IC's

Abstract

Enhancement-mode GaAs MESFET IC's have been fabricated using electron-beam lithography. A recessed-gate structure to reduce the gate-to-source resistance and an air-bridge overlay interconnect to reduce stray capacitance were employed. A 30-ps delay time with an associated power dissipation of 1.9 mW is obtained with a 0.6 × 20-µm gate GaAs MESFET, which is the highest speed among the GaAs FET logics. Divide-by-eight counter has exhibited a 3.8-GHz maximum clock frequency with a power dissipation of 1.2 mW/gate.