M-users B-servers arbiter for multiple-busses multiprocessors
- 31 August 1982
- journal article
- Published by Elsevier in Microprocessing and Microprogramming
- Vol. 10 (1), 11-18
- https://doi.org/10.1016/0165-6074(82)90117-x
Abstract
No abstract availableKeywords
This publication has 8 references indexed in Scilit:
- Interleaved Memory Bandwidth in a Model of a Multiprocessor Computer SystemIEEE Transactions on Computers, 1979
- Arbitre N-utilisateurs, une ressource, programmable. One-step N-user programmable arbiterElectronics Letters, 1979
- A General Model for Memory Interference in MultiprocessorsIEEE Transactions on Computers, 1977
- Cm*Published by Association for Computing Machinery (ACM) ,1977
- Interference in multiprocessor computer systems with interleaved memoryCommunications of the ACM, 1976
- Asynchronous Arbiter ModuleIEEE Transactions on Computers, 1975
- n-user asynchronous arbiterElectronics Letters, 1975
- Asynchronous ArbitersIEEE Transactions on Computers, 1972