Towards the limits of conventional MOSFETs: case of sub 30 nm NMOS devices
- 4 February 2004
- journal article
- Published by Elsevier in Solid-State Electronics
- Vol. 48 (4), 505-509
- https://doi.org/10.1016/j.sse.2003.09.026
Abstract
No abstract availableThis publication has 6 references indexed in Scilit:
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- Cryogenic operation of sub-30 nm nMOSFETs: impact of device architecturePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
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- A new 'shift and ratio' method for MOSFET channel-length extractionIEEE Electron Device Letters, 1992