The MAJIC-FET: A high speed power switch with low on-resistance

Abstract

For high power switching applications, it is desirable to have a semiconductor device that exhibits a low on resistance during current conduction in order to minimize the steady state conduction losses, and high speed turn-off to minimize the switching losses. The ideal device must operation at high current densities during forward conduction, minimizing the chip size required for any given current handling capability and lowering costs. This article describes a new device structure which realizes these features. In this device the injection of minority carriers from the gate junction controls its admittance.