A 16K CMOS EPROM

Abstract

THE CONTINUED NEED for low-power, high density- and high programming circuit which clamps the programming voltage Vd performance CMOS EPROMs has been established by the evolution of faster and denser low-power microprocessors, and their dependence on convenient program storage memories. This need was first served by the 4K CMOS EPROM¿2, implemented by a two transistor P-channel floating-gate cell. A second-generation 2Kx8 CMOS EPROM has been developed featuring a dual polysilicon N-channel EPROM cell3 which is a one-transistor cell fabricated in the P-well of a CMOS process; Figure 1. Microwatt standby power has been achieved by utilizing synchronous design on an oxide isolated ion-implanted silicon-gate CMOS technology.