Abstract
A novel scaling principle for heterojunction bipolar ICs (integrated circuits) including current and voltage scaling, a natural extension of Si device scaling, is proposed. It is shown that computer cycle time may thereby be reduced by an order of magnitude. It is theoretically verified that this scaling scheme can be realized by introducing temperature scaling and band gap scaling as well as dimensional scaling. It is assumed in this letter that the band gap scaling can be managed by present day semiconductor technology, especially for III–V compounds. These material problems will be discussed in a separate paper.

This publication has 4 references indexed in Scilit: