Transmission electron microscopy of cross sections of large scale integrated circuits

Abstract

Accurate cross-sectional views of large scale integrated circuits are useful for failure analysis and process evaluation. We have successfully prepared thin sections of finished devices cut perpendicular to the plane of the chip and examined them using transmission electron microscopy. We describe the sectioning procedure and show some cross-sectional views from memory cells of a CMOS RAM with poly-Si gates and tungsten second metal. Examples include micrographs of sections through 1) an IGFET showing the gate edges and the poly-Si grain size distribution, 2) metal to Si, and metal to poly-Si contacts, and 3) poly-Si runners. Each circuit element examined was uniquely identified by mapping the cross section through adjacent memory cells and noting the sequence of elements intersected. This demonstrated ability to examine cross sections of finished devices, consisting of multilayers of materials with different densities, hardness, etc., should prove useful whenever detailed device geometries, crystalline structures, etc., need to be examined in a manner which is relatively free of experimental artifacts.