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Super-integrated bipolar memory device for high-density, low-power storage
Home
Publications
Super-integrated bipolar memory device for high-density, low-power storage
Super-integrated bipolar memory device for high-density, low-power storage
SW
S.K. Wiedmann
S.K. Wiedmann
HB
H.H. Berger
H.H. Berger
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1 January 1971
proceedings article
Published by
Institute of Electrical and Electronics Engineers (IEEE)
p.
104
https://doi.org/10.1109/iedm.1971.188421
Abstract
No abstract available
Keywords
ELECTRODES
CHIP
ACCELERATION
RESISTORS
CYCLE TIME
Cited by 2 articles