Monolithic integration of fully ion-implanted lateral GaInAs pin detector/InP JFET amplifier for 1.3–1.55 μm optical receivers

Abstract

An optical receiver front-end consisting of a lateral interdigitated GaInAs pin detector integrated with an InP JFET amplifier has been fabricated. This lateral detector structure simplifies the GaInAs material growth requirement to a single layer and provides low capacitance. A quasiplanar approach has been developed in conjunction with a two-level metallisation interconnect scheme. An optical sensitivity of −29 dBm was measured at 560 Mbit/s and 1.3 μm wavelength.