The effect of silicon gate microstructure and gate oxide process on threshold voltage instabilities in BF2 implanted P+ gate p-channel MOSFETs
- 1 January 1990
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 1 reference indexed in Scilit:
- Hot-electron hardened Si-gate MOSFET utilizing F implantationIEEE Electron Device Letters, 1989