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Design Methodology Of Deep Submicron CMOS Devices For 1V Operation
Home
Publications
Design Methodology Of Deep Submicron CMOS Devices For 1V Operation
Design Methodology Of Deep Submicron CMOS Devices For 1V Operation
OY
Oyamatsu
Oyamatsu
KI
Kinugawa
Kinugawa
KA
Kakumu
Kakumu
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1 January 1993
conference paper
Published by
Institute of Electrical and Electronics Engineers (IEEE)
p.
89-90
https://doi.org/10.1109/vlsit.1993.760259
Abstract
No abstract available
Cited by 19 articles