Hierarchical verification of asynchronous circuits using temporal logic
- 1 January 1985
- journal article
- Published by Elsevier in Theoretical Computer Science
- Vol. 38, 269-291
- https://doi.org/10.1016/0304-3975(85)90223-3
Abstract
No abstract availableThis publication has 4 references indexed in Scilit:
- A hardware semantics based on temporal intervalsPublished by Springer Nature ,2005
- Introduction to VLSI systemsMicroelectronics Reliability, 1986
- Hardware Specification with Temporal Logic: An ExampleIEEE Transactions on Computers, 1982
- Temporal Specifications of Self-Timed SystemsPublished by Springer Nature ,1981