Optimum emitter grading for heterojunction bipolar transistors

Abstract
A simple procedure has been used to determine the optimum emitter grading for a heterojunction bipolar transistor (ABT). Use of this procedure allows maximum hole confinement in addition to minimum base/emitter turn‐on voltage, leading to a negligible collector/emitter offset voltage, both of which are necessary for high performance devices. By using a parabolic grading function at the emitter/base junction a Np+n Ga0.7Al0.3As/GaAs HBT has been fabricated, using molecular beam epitaxy, with a negligible collector/emitter offset voltage. A similar result can be obtained with a Ni emitter where the undoped i region is linearly graded.