C/sup 2/L: A new high-speed high-density bulk CMOS technology

Abstract

C/SUP 2/L, or closed COS/MOS logic, is a new structural approach to high-speed bulk-silicon COS/MOS logic. C/SUP 2/L is a self-aligned silicon-gate CMOS technology where the gate completely surrounds the drain. The use of such geometry maximises the transconductance to capacitance ratio for devices and thus allows high on-chip speed. The CDP 1802 single-chip 8-bit microprocessor, as well as several memory and I/O circuits announced recently by the RCA Solid State Division, are fabricated in this new technology. Generally, C/SUP 2/L devices show an improvement in packing density by a factor of 3 over standard CMOS and operate at frequencies approximately 4 times faster than standard CMOS. The fabrication sequence for C/SUP 2/L devices requires 6 photomasks (one less than standard CMOS).