Statistical analysis of propagation delay in digital integrated circuits
- 1 January 1972
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. XV, 66-67
- https://doi.org/10.1109/isscc.1972.1155013
Abstract
The Monte Carlo method has been applied to compute distributions of delay in a logic circuit. This paper will explain adopted approach, comparing computed results to distributions measured on manufactured product.Keywords
This publication has 5 references indexed in Scilit:
- Design of Logic Circuit Technology for IBM System/370 Models 145 and 155IBM Journal of Research and Development, 1971
- A distributed model of the junction transistor and its application in the prediction of the emitter-base diode characteristic, base impedance, and pulse response of the deviceIEEE Transactions on Electron Devices, 1965
- A Statistical Approach to the Design of Diffused Junction TransistorsIBM Journal of Research and Development, 1964
- A self-consistent iterative scheme for one-dimensional steady state transistor calculationsIEEE Transactions on Electron Devices, 1964
- Design of ACP Resistor-Coupled Switching CircuitsIBM Journal of Research and Development, 1963