Profile leverage in self-aligned epitaxial Si or SiGe base bipolar technology
- 4 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
The authors have developed a planar, self-aligned, epitaxial Si or SiGe-base bipolar technology and explored intrinsic profile design leverage for high-performance devices in three distinct areas: transit time reduction, collector-base (CB) junction engineering, and emitter-base (EB) junction engineering. High f/sub T/ Si (30-50 GHz) and SiGe (50-70 GHz) epi-base devices were integrated with trench isolation and polysilicon load resistors to evaluate ECL (emitter coupled logic) circuit performance. A 15% enhancement in ECL circuit performance was observed for SiGe relative to Si devices with similar base doping profiles in a given device layout. Minimum SiGe-base ECL gate delays of 24.6 ps (8 mW) were obtained. Lightly doped spacers were positioned in both the EB and CB junctions to tailor junction characteristics (leakage, tunneling, and avalanche breakdown), reduce junction capacitances, and thereby obtain an overall performance improvement.<>Keywords
This publication has 4 references indexed in Scilit:
- The implementation of a reduced-field profile design for high-performance bipolar transistorsIEEE Electron Device Letters, 1990
- Self-aligned SiGe-base heterojunction bipolar transistor by selective epitaxy emitter window (SEEW) technologyIEEE Electron Device Letters, 1990
- A reduced-field design concept for high-performance bipolar transistorsIEEE Electron Device Letters, 1989
- Low-temperature silicon epitaxy by ultrahigh vacuum/chemical vapor depositionApplied Physics Letters, 1986