Design considerations for high-voltage overlay annular diodes

Abstract

The physical parameters necessary to achieve high breakdown voltages in planar diodes with metal junction overlay and annular guard rings are considered. The experimental data are derived from p-ν-n structures with ν resistivity greater than 300 Ω . cm and the primary parameters considered are the extent of junction overlay metallization, the effect of lateral junction curvature, the nature of the annular field terminator and its spacing from the overlay, the dielectric thickness beneath the overlay metallization, and the use of auxiliary dielectric material to obviate arcing and desensitize the structure to ambient effects. By appropriate manipulation of these parameters, diode chips with 10-2-cm2junction area were fabricated to leakages less than 1 µA at 1500 V.