Accurate metallization capacitances for integrated circuits and packages
- 1 August 1973
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 8 (4), 289-290
- https://doi.org/10.1109/JSSC.1973.1050400
Abstract
The parallel-plate formula is widely used by the solid-state circuit designer to estimate capacitances in integrated circuits. Since considerable errors may result from using this approximation, this correspondence gives correction curves for a wide range of parameters. It is shown that the finite conductor thickness may significantly contribute to the increase in capacitance.Keywords
This publication has 4 references indexed in Scilit:
- Efficient Capacitance Calculations for Three-Dimensional Multiconductor SystemsIEEE Transactions on Microwave Theory and Techniques, 1973
- Calculation of Capacitance Coefficients for a System of Irregular Finite Conductors on a Dielectric SheetIEEE Transactions on Microwave Theory and Techniques, 1971
- Calculation of Coefficients of Capacitance of Multiconductor Transmission Lines in the Presence of a Dielectric InterfaceIEEE Transactions on Microwave Theory and Techniques, 1970
- A General Method for Obtaining Impedance and Coupling Characteristics of Practical Microstrip and Triplate Transmission Line ConfigurationsIBM Journal of Research and Development, 1969