Power DMOS for high-frequency and switching applications

Abstract

The virtues of DMOS over other MOS technologies are first presented. The design considerations for the device are then given. Device fabrication and characteristics are also shown. With the data from these devices, a small-signal low-frequency model is derived which incorporates velocity saturation. The high-voltage breakdown is considered and an analysis of both the theoretical and experimental values are compared. Both punchthrough and avalanche breakdown of the DMOS device are discussed. The device has exceptional power gains in the VHF region considering its simplicity in design rules. A high-frequency linear model is constructed and is valid up to several gigahertz. Several improvements are proposed involving more strigent design rules which should yield power gains in the gigahertz region. With the process presented in this paper both high-frequency performance and high-voltage breakdown are obtained.