A 32-bit VLSI digital signal processor
- 1 October 1985
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 20 (5), 998-1004
- https://doi.org/10.1109/jssc.1985.1052427
Abstract
A general-purpose programmable digital signal processor (DSP) has been implemented in 1.5-/spl mu/m (L/SUB eff/) NMOS technology using full-custom circuit design for high performance. The DSP has a 32-bit instruction set, 32-bit data path, and full-hardware 32-bit floating-point arithmetic. The architecture is described section by section, and an overview of the instruction set is presented. The extensive design verification process applied to the DSP is also described.Keywords
This publication has 1 reference indexed in Scilit:
- Space Efficient Algorithms for VLSI Artwork AnalysisPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1983