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Considerations for scaled CMOS source/drains
Home
Publications
Considerations for scaled CMOS source/drains
Considerations for scaled CMOS source/drains
DS
D.B. Scott
D.B. Scott
YS
Y.C. See
Y.C. See
CL
C.K. Lau
C.K. Lau
RD
R.D. Davies
R.D. Davies
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1 January 1981
proceedings article
Published by
Institute of Electrical and Electronics Engineers (IEEE)
https://doi.org/10.1109/iedm.1981.190139
Abstract
No abstract available
Keywords
CONSIDERATIONS FOR SCALED CMOS SOURCE/DRAINS
Cited by 2 articles