An inherently monotonic 12 bit DAC
- 1 December 1979
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 14 (6), 904-911
- https://doi.org/10.1109/jssc.1979.1051296
Abstract
Describes a 12 bit DAC which uses diffused resistors and requires no trimming to guarantee monotonicity for all grades over the temperature range. The segmented ladder design, departing from the traditional R-2R approach used in virtually all high-speed high resolution converters, provides inherent monotonicity and differential linearity as high as 13 bits. Also afforded is a more uniform step size over the temperature range than the trimmed 12 bit converters. The only critical resistor matching occurs at the major carries or midpoints of each of the eight segments and the tolerances are equivalent to that of a 9 bit DAC, or eight times lower than the R-2H approach. In essence, the problem has been divided into eight separate problems, each with tolerances eight times lower than that of a 12 bit DAC. The converter has been found to be immune to variations in temperature, time, process, and mechanical stress. The circuit also features differential high compliance current outputs, wide supply range, and a multiplying input.Keywords
This publication has 5 references indexed in Scilit:
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