New Developments in Time and Pulse Height Digitizers
- 1 January 1980
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 27 (1), 333-337
- https://doi.org/10.1109/tns.1980.4330850
Abstract
Recent progress in LSI circuits has brought monolithic flash ADCs and RAMs, capable of operating up to 100 MHz. They open new possibilities to designers of time and charge digitizers. A simple technique to increase the dynamic range of a 6 bit/30 MHz low cost ADC has been developed. The transfer function is approximately logarithmic and covers a 9 bit dynamic range. An application of the same ADC to measure directly the charge division in a sense wire of a wire chamber is discussed. A fast 256 × 4 ECL RAM has been tested as a buffer memory of the ADC but also as the main element in time digitizers.Keywords
This publication has 8 references indexed in Scilit:
- A high-speed 7 bit A/D converterIEEE Journal of Solid-State Circuits, 1979
- A high-speed 8 bit A/D converter based on a Gray-code multiple folding circuitIEEE Journal of Solid-State Circuits, 1979
- Gigabit electronics—A reviewProceedings of the IEEE, 1979
- Monolithic expandable 6b 15MHz CMOS/SOS A/D converterPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- A monolithic, fully parallel, 8b A/D converterPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- Multiwire and drift proportional chambersPhysics Today, 1978
- A fast 7.5 ns access 1K-bit RAM for cache-memory systemsIEEE Journal of Solid-State Circuits, 1978
- Linear electronic analog/digital conversion architectures, their origins, parameters, limitations, and applicationsIEEE Transactions on Circuits and Systems, 1978