A 32-Mb SPRAM With 2T1R Memory Cell, Localized Bi-Directional Write Driver and `1'/`0' Dual-Array Equalized Reference Scheme
- 22 March 2010
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 45 (4), 869-879
- https://doi.org/10.1109/jssc.2010.2040120
Abstract
A 32-Mb SPin-transfer torque RAM (SPRAM) chip was demonstrated with an access time of 32 ns and a cell write-time of 40 ns at a supply voltage of 1.8 V. The chip was fabricated with 150-nm CMOS and a 100 × 200-nm tunnel magneto-resistive (TMR) device element. A required thermal stability of 67 of the TMR device was estimated by taking into account the disturbances during read operations and data retention periods of 10 years for nonvolatile operation. The 32-Mb SPRAM chip features three circuit technologies suitable for a large-scale array: 1) a two-transistor, one-resistor (2T1R) type memory cell for achieving a sufficiently large write current despite the small cell size, 2) a compact read/write separated hierarchy bit/source-line structure with a localized bi-directional write driver for efficiently distributing write current, and 3) a '1'/'0' dual-array equalized reference scheme for stable read operation.Keywords
This publication has 7 references indexed in Scilit:
- A 32-Mb SPRAM With 2T1R Memory Cell, Localized Bi-Directional Write Driver and `1'/`0' Dual-Array Equalized Reference SchemeIEEE Journal of Solid-State Circuits, 2010
- 2 Mb SPRAM (SPin-Transfer Torque RAM) With Bit-by-Bit Bi-Directional Current Write and Parallelizing-Direction Current ReadIEEE Journal of Solid-State Circuits, 2008
- TMR Design Methodology for SPin-Transfer Torque RAM (SPRAM) with Nonvolatile and SRAM Compatible OperationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2008
- A novel SPRAM (SPin-transfer torque RAM) with a synthetic ferrimagnetic free layer for higher immunity to read disturbance and reducing write-current dispersionPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2007
- A novel nonvolatile memory with spin torque transfer magnetization switching: spin-ramPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2006
- Thermally assisted magnetization reversal in the presence of a spin-transfer torquePhysical Review B, 2004
- A High-Speed 128-kb MRAM Core for Future Universal Memory ApplicationsIEEE Journal of Solid-State Circuits, 2004