A Combined Force and Cut Algorithm for Hierarchical VLSI Layout
- 1 January 1982
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 5 references indexed in Scilit:
- The placement problem as viewed from the physics of classical mechanicsPublished by Association for Computing Machinery (ACM) ,1988
- A forced directed component placement procedure for printed circuit boardsIEEE Transactions on Circuits and Systems, 1979
- A Min-Cut Placement Algorithm for General Cell Assemblies Based on a Graph RepresentationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979
- A proper model for the partitioning of electrical circuitsPublished by Association for Computing Machinery (ACM) ,1972
- An Efficient Heuristic Procedure for Partitioning GraphsBell System Technical Journal, 1970