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A charge-control transistor model for network analysis programs
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A charge-control transistor model for network analysis programs
A charge-control transistor model for network analysis programs
HG
H.K. Gummel
H.K. Gummel
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1 April 1968
journal article
Published by
Institute of Electrical and Electronics Engineers (IEEE)
in
Proceedings of the IEEE
Vol. 56
(4)
,
751
https://doi.org/10.1109/PROC.1968.6373
Abstract
A representation is given of an Ebers-Moll model with charge control that employs only standard circuit elements. Storage of carriers associated with current flow is represented with the aid of two current-controlled voltage generators.
Keywords
DIODES
FREQUENCY
TRANSIENT ANALYSIS
VOLTAGE CONTROL
CAPACITORS
ANALOG COMPUTERS
COMPUTER NETWORK RELIABILITY
CIRCUIT ANALYSIS
SWITCHING CIRCUITS
GEOMETRY
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Cited by 6 articles