Abstract
Traditionally, a transport protocol corrects errors in a computer communication network using a simple ARQ protocol. With the arrival of broadband networks, forward error correction is desirable as a complement to ARQ. This paper describes a simplified Reed-Solomon erasure correction coder architecture, adapted for congestion loss in a broadband network. Simulations predict it can both encode and decode at rates up to 1 gigabit per second in a custom 1 micron CMOS VLSI chip.