Abstract
Horizon is a shared-memory multiple-instruction-stream-multiple-data-stream architecture currently under study. The performance of one Horizon processing element (PE) is quantified by user operations per instruction, the instructions per tick, and the basic clock rate. Assuming there is sufficient parallelism within a problem, the performance of one PE is multiplied by the number of PEs contained in the Horizon system. For a 256-PE Horizon the expected sustained performance is on the order of 50 billion user operations per second for problems with sustained parallelism of 8000 to 12000 instruction streams.

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