Synthesis of Networks with a Minimum Number of Negative Gates
- 1 January 1971
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-20 (1), 49-58
- https://doi.org/10.1109/t-c.1971.223081
Abstract
In this paper we develop an algorithm to design a switching network using only gates which represent negative functions. The number of gates in the network is minimized under the conditions that 1) the network consists of two levels, and 2) no fan-in restriction on each gate is imposed.Keywords
This publication has 4 references indexed in Scilit:
- Gate-Interconnection Minimization of Switching Networks Using Negative GatesIEEE Transactions on Computers, 1971
- Synthesis of combinational logic using three-input majority gatesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1962
- A Truth Table Method for the Synthesis of Combinational LogicIRE Transactions on Electronic Computers, 1961
- Lattice Theoretic Properties of Frontal Switching FunctionsJournal of Mathematics and Physics, 1954