A VLSI superminicomputer CPU

1 January 1984

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

Vol. XXVII, 174-175
https://doi.org/10.1109/isscc.1984.1156648

Abstract

A 5-chip set implementing 304 instructions of a 32b super-minicomputer, will be reported. The designs include 1,220,500 transistors and operate with a 200ns microcycle.

Keywords

VERY LARGE SCALE INTEGRATION
PREFETCHING
READ-WRITE MEMORY
DESIGN AUTOMATION
MICROPROCESSORS
SYSTEM BUSES
DECODING
REGISTERS
CLOCKS
READ ONLY MEMORY

Cited by 6 articles