One transistor ferroelectric memory with Pt/Pb/sub 5/Ge/sub 3/O/sub 11//Ir/poly-Si/SiO/sub 2//Si gate-stack
- 7 August 2002
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 23 (6), 339-341
- https://doi.org/10.1109/led.2002.1004228
Abstract
One transistor ferroelectric nonvolatile memory with gate stack of Pt/Pb/sub 5/Ge/sub 3/O/sub 11//lr/poly-Si/SiO/sub 2//Si was successfully fabricated. This device features a saturated memory window of 3 V at a programming voltage of higher than 3 V from C-V and I-V measurements. The memory window decays rapidly within 10 seconds after programming, but remains stable at 1 V for up to 100 h. The "on" and "off" state currents are greater than 10 /spl mu/A//spl mu/m and less 0.01 pA//spl mu/m, respectively, at a drain voltage of 0.1 V.Keywords
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