Modeling and Experimental Verification of a High Impedance Arcing Fault in MV Networks

Abstract

In this paper, a high impedance arcing fault of the tree leaning type in medium voltage (MV) networks is modeled and experimentally verified. The fault is represented as two parts; an arc model and a high resistance. The arc is generated by the tree leaning towards the network conductor and the tree resistance limits the fault current. The arcing element is dynamically simulated using thermal equations. The arc model parameters and resistance values are determined using the experimental results. The fault behavior is simulated by the ATP/EMTP program, in which the arc model is realized using the universal arc representation. The experimental results have validated the system transient model. Discrete wavelet transform (DWT) is used to extract the fault features and therefore localize the fault events. It is found that arc restrikings enhance fault detection when DWT is utilized