A Method for Digitally Simulating Shorted Input Diode Failures
- 8 July 1969
- journal article
- website
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Bell System Technical Journal
- Vol. 48 (6), 1957-1966
- https://doi.org/10.1002/j.1538-7305.1969.tb01159.x
Abstract
Most existing digital fault simulators can simulate only a somewhat restrictive class of failures; namely, stuck at “1” and stuck at “0” faults. The problem seems to be the lack of techniques for properly treating the effects due to “backward propagation” of errors. This paper describes a method for illustrating how shorted input diode failures, which previously could not be simulated, can be handled by digital methods. The method is applicable to all other modes of failures describable by truth tables or Boolean expressions. Furthermore, we examine the problem of circuit oscillations caused by backward propagating errors. We conclude that failure induced oscillations can only occur under very restrictive conditions.Keywords
This publication has 4 references indexed in Scilit:
- Design and Use of Fault Simulation for Saturn Computer DesignIEEE Transactions on Electronic Computers, 1967
- Diagnosis of Automata Failures: A Calculus and a MethodIBM Journal of Research and Development, 1966
- On Finding a Nearly Minimal Set of Fault Detection Tests for Combinational Logic NetsIEEE Transactions on Electronic Computers, 1966
- The Diagnosis of Asynchronous Sequential Switching SystemsIEEE Transactions on Electronic Computers, 1962