A simple scheme for slot reuse without latency for a dual bus configuration
- 1 January 1993
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE/ACM Transactions on Networking
- Vol. 1 (1), 96-104
- https://doi.org/10.1109/90.222910
Abstract
Reuse without latency for the Dual Bus configuration is studied. The scheme relies on information read in the previous slot and will be referred to as Previous Slot Information (PSI) slot reuse. The scheme requires a minimal addition to the stations hardware and its reliability is h@. The efficiency of PSI is checked over a wide range of parameters and is found to be almost as good as Destination Release, The scheme can be implemented with or without the addition of erasure nodes.Keywords
This publication has 4 references indexed in Scilit:
- Efficient multi-segment message transmission with slot reuse on DQDBPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1991
- A simple multiple access protocol for metropolitan area networksPublished by Association for Computing Machinery (ACM) ,1990
- Twelve random access strategies for the fiber optic networksIEEE Transactions on Communications, 1988
- Description of Fasnet-A Unidirectional Local-Area Communications NetworkBell System Technical Journal, 1982