Two Hi-CMOS static RAM's with 2K word by 8 bit organization have been developed. These RAM's are fabricated with single polysilicon technology, which reduces processing costs. A novel J-FET powered static cell formed in the p well is used. The cell area is reduced to 80 percent that of the standard cell. Hi-CMOS well structure gives good immunity to alpha-particle-induced soft errors. These new RAM's have an address access time of 74 ns, an operating power dissipation of 200 mW, and a standby dissipation of 25 µW.