Trimming CMOS smart imager with tunneleffect nonvolatile analogue memory

Abstract
Amplified MOS imagers (AMIs) have the advantage of being compatible with conventional CMOS analogue/digital circuit design. One of the major problems in AMIs is their large fixed pattern noise compared to CCD imagers. The Letter presents the structure of a nonvolatile tunnel-effect analogue memory which is fully compatible with a standard CMOS process and which can reduce significantly the offset-like fixed pattern noise in AMI arrays.