A Systematically Designed Binary Array Processor
- 1 April 1980
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-29 (4), 278-287
- https://doi.org/10.1109/tc.1980.1675566
Abstract
A class of binary array processors (BAP) have evolved over the past 20 years primarily intended for image-processing applications. The advent of large-scale integrated-circuit technology makes the construction of these processors feasible. In this paper three basic instruction types that characterize a BAP are defined and the systematic design of a processor called BASE is described in detail. Two forms of BASE are discussed, a fully parallel version and an add-on unit for a conventional computer. The systematic design has enabled an assembly language with a simple, APL-like syntax to be developed. Several program examples to illustrate features of the processor are given.Keywords
This publication has 8 references indexed in Scilit:
- A cellular logic array for image processingPattern Recognition, 1973
- Feature Extraction by Golay Hexagonal Pattern TransformsIEEE Transactions on Computers, 1971
- Local Properties of Binary Images in Two DimensionsIEEE Transactions on Computers, 1971
- Hexagonal Parallel Pattern TransformationsIEEE Transactions on Computers, 1969
- The SOLOMON ComputerIEEE Transactions on Electronic Computers, 1963
- The Illinois Pattern Recognition Computer-ILLIAC IIIIEEE Transactions on Electronic Computers, 1963
- Pattern Detection and RecognitionProceedings of the IRE, 1959
- A Computer Oriented toward Spatial ProblemsProceedings of the IRE, 1958