Cache memory design: An evolving art: Designers are looking to line size, degree of associativity, and virtual addresses as important parameters in speeding up the operation
- 1 January 1987
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Spectrum
- Vol. 24 (12), 40-45
- https://doi.org/10.1109/MSPEC.1987.6448096