Relaxing synchronization in distributed simulated annealing

1 January 1995

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Parallel and Distributed Systems

Vol. 6 (2), 189-195
https://doi.org/10.1109/71.342132

Abstract

This paper presents a cost error measurement scheme and relaxed synchronization method, for simulated annealing on a distributed memory multicomputer, which predicts the amount of cost error that an algorithm will tolerate. An adaptive error control method is developed and implemented on an Intel iPSC/2

Keywords

Cited by 8 articles