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Novel Multibit Convolver/Correlator Chip Design Based On Systolic Array Principles
Home
Publications
Novel Multibit Convolver/Correlator Chip Design Based On Systolic Array Principles
Novel Multibit Convolver/Correlator Chip Design Based On Systolic Array Principles
JM
J. G. McWhirter
J. G. McWhirter
JM
J. V. McCanny
J. V. McCanny
KW
K. W. Wood
K. W. Wood
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28 December 1982
proceedings article
Published by
SPIE-Intl Soc Optical Eng
Vol. 341
,
66-75
https://doi.org/10.1117/12.933697
Abstract
A novel multi-bit convolver/correlator circuit is described. The circuit has been designed to operate as a systolic array of simple one bit processor and memory cells and, as a result it can operate at relatively high data rates by making efficient use of silicon area. Since the design is extremely regular in nature and requires very little control it should be easy to implement in VLSI technology. The size of circuit which can be fabri-cated and the data rate which can be achieved will of course depend on the specific tech-nology which is chosen.© (1982) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.
Keywords
DATA STORAGE
SILICON
VERY LARGE SCALE INTEGRATION
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Cited by 7 articles