High-Speed Plated-Wire Memory System
- 1 June 1967
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electronic Computers
- Vol. EC-16 (3), 335-343
- https://doi.org/10.1109/pgec.1967.264691
Abstract
The plated-wire memory, combined with functional circuit integration, is a strong contender for economic, high-speed, large-capacity memory systems. Important attributes of the plated-wire memory are high-speed DRO and NDRO capability, low digit WRITE current, high output sense signal and low word-to-digit line crosspoint capacitance. Design and operational results for a 1024-word by 80-bit store model are reported in detail. Utilizing a transformerless diode matrix for high-speed word selection, an access time of 75 ns and a READ-WRITE cycle time of 150 ns have been realized.Keywords
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