CMOS/SOS serial-parallel multiplier
- 1 October 1975
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 10 (5), 307-313
- https://doi.org/10.1109/jssc.1975.1050616
Abstract
No abstract availableThis publication has 4 references indexed in Scilit:
- A MOS LSI double second order digital filter circuitPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1975
- Design and application of electronically programmable LSI arraysPublished by Association for Computing Machinery (ACM) ,1975
- A 40-ns 17-Bit by 17-Bit Array MultiplierIEEE Transactions on Computers, 1971
- An approach to the implementation of digital filtersIEEE Transactions on Audio and Electroacoustics, 1968